There is a growing desire for a “system on a chip” as integrated circuit technology enters the ultra large scale integration (ULSI) era. Ideally, the industry would like to build a computing system by fabricating all the necessary integrated circuits on one substrate, as compared to fabricating many chips of different functions on multiple substrates. The concept of “system on a chip” has been around since the very large scale integration (VLSI) era (early 1980s), but even today, it is very difficult to implement such a truly high-performance system on a single chip because of vastly different fabrication processes and different manufacturing yields for various I/O, logic and memory circuits.
In CMOS logic used for manufacturing system-on-a-chip (SOC) products there are usually gates of differing thicknesses, for example, a SOC may have a thin silicon oxide gate and a thick oxide gate. The thin gate is used for high performing devices since it facilitates faster switching. The thicker gate is used for analog, I/O, voltage regulation and other applications requiring higher voltage than the thin gate can tolerate. In more complex devices, there may even be more than two gate oxide thicknesses in a CMOS technology.
There is a need for new manufacturing processes which enable more control of thin gate oxide thickness on SOC devices.